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| Ordering number : ENN*6685 CMOS IC LC7454A/M CMOS Data Slicer Preliminary Overview The LC7454A/M is a data slicer IC for the Index Plus + signals. The LC7454A/M extracts the Caption and the Index Plus + data form the Vertical Blanking Period of the TV signal and send it out to the decoder IC (Usually Microcomputer). The LC7454A/M can be used to extract the Closed Caption signals, the XDS signals and the Index Plus + signals. Features (1) Low power dessipation by CMOS process (2) Stable signal extraction by integrated peak hold circuit and digital circuit. (3) Operation Voltage range : 5V 10% (4) Package LC7454A : DIP18 LC7454M : MFP20 Ver.1.03 90699 91400 RM (IM) Ohta No.6685-1/16 LC7454A/M Pin Assignment DIP18 1 VSS1 2 TEST 3 LN26 4 O/E/CFOUT 5 HS/CFIN 6 DATA 7 SCKIN 8 CE 9 IOC CP 18 VSS2 17 VDD2 16 MOD1 15 VCOR 14 6 DATA CVIN 13 MOD0 12 VDD1 11 SLICE 10 7 SCKIN 8 CE 9 IOC 10 NC CVIN 15 MOD0 14 VDD1 13 SLICE 12 NC 11 1 VSS1 2 TEST 3 LN26 4 O/E/CFOUT 5 HS/CFIN MFP20 CP 20 VSS2 19 VDD2 18 MOD1 17 VCOR 16 LC7454A LC7454M * VDD1and VSS1are power supply terminals for digital circuit. VDD2 and VSS2 are power supply terminals for analog circuit. Connect there terminals as the following diagram in order to reduce the noise disturbance between two powers. LC7454A/M Power supply VDD1 VSS1 VDD2 VSS2 No.6685-2/16 LC7454A/M Package Dimension (unit : mm) 3007B SANYO : DIP-18 Package Dimension (unit : mm) 3036C SANYO : MFP-20 No.6685-3/16 LC7454system block diagram O/E/CFOUT HS/CFIN CVIN Pedestal clamp (Mode 2) (Mode 2) (Mode 1) (Mode3) Oscillation (Mode 1,3) circuit Data slicer Sync separator (Mode 3) (Mode 1) (Mode 2) PLL reference clock CP PLL (VCO) 16bit line select data buffer Data slicer control Slice line selection VCOR SLICE LN26 32bit data buffer Data judgment Data transmit control LC7454A/M IOC CE Data input/output control DATA 16bit data judgement buffer 32bit data output buffer 1 32bit data output buffer 2 32bit data output buffer 3 32bit data output buffer 4 32bit data output buffer 5 SCKIN Input control No.6685-4/16 LC7454A/M Operation on each mode The LC7454 has three operating modes. The operation mode be selected by the status of MOD0 and MOD1 terminals. The functionality of three modes are the same. Only the PLL reference frequency which is used to generate operation clock is different. Use mode1 or mode3 only in the application which uses 2x data. Any mode (Mode1,2 or 3) can be used in the 1x data only application. Terminal MOD1 Open Open VDD MOD0 Open VDD1 Open MODE Mode1 Mode2 Mode3 Applications NTSC-VCR NTSC-VCR NTSC-TV PLL reference Use H-sync signal which is separated from C-Video signal. Use 1/32 divided signal 503 KHz which is generated by external ceramic resonator. Use H-sync signal from Fly Back. Terminal Functions Terminal # (DIP18) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 *1 *2 *3 *4 Terminal name VSS1 TEST LN26 Ground Test terminal, Open in normal operation 32s Pulse output at line 26 timing on both field *1 Output terminal for ceramic resonator Input terminal for Ceramic resonator *2 *3 *4 Pulse output for field judgment *1 Function Description Mode 1 Mode 2 Mode 3 O/ E /CFOUT Pulse output for field judgment HS /CFIN Sync separated HS pulse output External HS pulse input DATA SCKIN CE Line select data input and slice data output Data transmit clock input Chip select input Data direction control signal input Pulse output at selected slice line Power terminal Open Conposit video input Connect to VDD IOC SLICE VDD1 MOD0 CVIN VCOR MOD1 VDD2 VSS2 CP Open Connect resister for internal VCO oscillation frequency control Open Power terminal Ground Filter terminal for internal PLL Open Connect to VDD `H' level in Odd field, `L' level in Even field. N-ch open drain in output mode. Feed `L' level only when data transmission is in effect. If CE='H', data terminal will become input/output disable, SCKIN terminal will become input disable. `H' level : Output mode `L' level : Input mode No.6685-5/16 LC7454A/M 1. Absolute Maximum Ratings at VSS=0V and Ta=25C Parameter Maximum Supply voltage Input voltage Output voltage Input/output voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDDMAX VI VO VIO Pdmax Pins VDD1,VDD2 CVIN,SCKIN, CE ,IOC LN26, O/ E /CFOUT,SLICE DATA, HS /CFIN DIP18 MFP20 Conditions VDD1=VDD2 Ratings typ. unit V min. -0.3 -0.3 -0.3 -0.3 max. +7.0 VDD+0.3 VDD+0.3 VDD+0.3 300 150 mW Topr Tstg -30 -55 +70 +150 C * VSS1 and VSS2 must be the same level. VDD1 and VDD2 must be the same level. 2. Allowable Operating Conditions at Ta=-30C to +70C, VSS=0V Parameter Operating Supply voltage `H' level input voltage `L' level input voltage CVIN input amplitude HS input frequency range Oscillation frequency range (Note 1) Oscillation stabilizing time period (Note 2) Symbol VDD VIH VIL CVSYNC fH Pins VDD1,VDD2 HS /CFIN, DATA, SCKIN, CE , IOC HS /CFIN, DATA, SCKIN, CE , IOC CVIN HS /CFIN Conditions VDD1=VDD2 VDD[V] min. 4.5 Ratings typ. max. 5.5 VDD 0.25VDD unit V 4.5 to 5.5 0.75VDD 4.5 to 5.5 SYNC-WHITE=1.0V Mode3 4.5 to 5.5 4.5 to 5.5 VSS 1Vp-p -3dB 1V 1Vp-p +3dB 15.23 15.73 16.23 kHz FmCF HS /CFIN O/ E /CFOUT *Mode2 *Refer to figure 1 4.5 to 5.5 503 tmsCF HS /CFIN O/ E /CFOUT *MODE2 *Refer to figure 2 4.5 to 5.5 0.5 5 ms (Note 1) Refer to table 1 for oscillator constants. (Note 2) Oscillation stabilizing period is the time needed to stabilize the oscillation after power is fed. Refer to figure 2. No.6685-6/16 LC7454A/M 3. Electrical Characteristics at Ta=-30C to +70C, VSS=0V Ratings typ. Parameter `H' level input current `L' level input current `H' level output voltage `L' level output voltage Input clamp voltage Clamp input current Clamp output current Power dissipation Symbol IIH IIL VOH Pins HS /CFIN, DATA, SCKIN, CE , IOC HS /CFIN, DATA, SCKIN, CE , IOC Conditions VIN=VDD VIN=VSS IOH=-4mA VDD[V] 4.5 to 5.5 4.5 to 5.5 min. max. 1 unit A -1 V VOL VCLM P CII COI IDD LN26, SLICE, O/ E /CFOUT, HS /CFIN LN26, DATA, O/ E /CFIN, HS /CFIN, SLICE CVIN CVIN CVIN VDD1,VDD2 4.5 to 5.5 VDD-1.2 IOL=10mA 4.5 to 5.5 1 5.0 CVIN=3V CVIN=2V 5.0 5.0 4.5 to 5.5 2.3 5 -120 2.5 10 2.7 18 -30 20 mA A -70 8 4. Serial Input/Output Characteristics at Ta=-30C to +70C, VSS=0V Parameter Cycle `L' Level pulse width `H' Level pulse width Input clock Symbol tCKCY tCKL tCKH tICK Set up time Serial input Data set up time Data hold time tIDO tHDO DATA Pins SCKIN SCKIN SCKIN SCKIN Conditions Refer to figure 3 Refer to figure 3 Refer to figure 3 Ratings typ. unit s VDD[V] 4.5 to 5.5 4.5 to 5.5 4.5 to 5.5 min. 1 0.5 0.5 1 max. Serial clock 4.5 to 5.5 *Applied to CE falling edge. *Refer to figure 3 *Applied to SCKIN 4.5 to 5.5 rising edge. *Refer to figure 3 4.5 to 5.5 0.1 0.1 Serial output Output delay tODT DATA *Applied to SCKIN 4.5 to 5.5 falling edge. *Use external 1k pull-up resister. *Refer to figure 3 0.5 Table 1. Ceramic resonator constants Type of oscillation 503kHz ceramic oscillation Maker Murata Resonator CSB 503E9 C1 150pF C2 150pF * Both C1 and C2 must be use K rank (10%) and SL characteristics. (Notes) * Please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. * If you use other oscillators herein, we provide no guarantee for the characteristics. No.6685-7/16 LC7454A/M HS/CFIN O/E/CFOUT CF C1 C2 Figure 1 Ceramic resonator oscillation VDD Power supply Lowest limit of operation 0V tmsCF HS/CFIN O/E/CFOUT Figure 2 Oscillation stable time period 0.5VDD tICK CE tCKCY VDD 1k tCKL SCKIN tCKH DATA(Input) 50pF tIDT DATA(Output) tODT tHDT *DATA is high-impedance when CE=H Figure 3 Serial output test condition No.6685-8/16 LC7454A/M Slice line selection Line26 C-Video LN26 CE IOC L level SCKIN DATA D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 Slice line selection data is sent to the LC7454 in serial format . When sending the data to LC7454, the IOC terminal has to be `L' level (It will change the Data line to the input mode). The data has to be transmitted after sensing the LN26 signal. Before sending the data, set the CE terminal to the `L' level. Each bit of the data has to be changed at the falling edge of the SCKIN and the data is captured into the LC7454 at raising edge of the SCKIN signal. No.6685-9/16 Data output timing Selected line 1 12H (L level) (H level) Data 13H 14H Data 15H 17H 19H 20H 21H 22H 23H Data 16H 24H Data 18H Data Selected line 2 Selected line 3 Selected line 4 Selected line 5 C-Video LN26 CE IOC (H level) Data transfer clock (inside IC) 32 bit data output buffer 1 32 bit data output buffer 4 32 bit data output buffer 3 32 bit data output buffer 2 32 bit data output buffer 5 LC7454A/M C-Video 25H 26H 27H 28H 29H 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 40H LN21 CE 16 clock 32 clock 32 clock 32 clock 32 clock 32 clock SCKIN DATA b0 b1 b14 13 b15 b0 b1 29 b30 b31 b0 b1 29 b30 b31 b0 b1 29 b30 b31 b0 b1 29 b30 b31 b0 b1 29 b30 b31 [16 bit data judgment buffer data] [Data of 32 bit data output buffer 1] [Data of 32 bit data output buffer 3] [Data of 32 bit data output buffer 2] [Data of 32 bit data output buffer 5] [Data of 32 bit data output buffer 4] No.6685-10/16 LC7454A/M The LC7454 can extract the Index Plus + format data. If the line contains the 1x format data, the first 15 bits of the 32 bit data buffer are filled with `0' and 16th bit becomes `1'. The extracted data is stored is stored form 16th to 31st bit. 1x data format Data Byte 1 Data Byte 2 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 LSB Output direction 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 MSB b31 b0 Fixed to `0000000000000001', if 1x data is received 32 bit data output buffer 2x data format Data Byte 1 Data Byte 2 Data Byte 3 Data Byte 4 b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b0 b1 b2 b3 b4 b5 b6 p3 b0 b1 b2 b3 b4 b5 b6 p4 LSB Output direction b0 b1 b2 b3 b4 b5 b6 p1 b0 b1 b2 b3 b4 b5 b6 p2 b0 b1 b2 b3 b4 b5 b6 p3 b0 b1 b2 b3p b4 b5 b6 p4 MSB b31 b0 32 bit data output buffer Five 32 bit data buffer are provided to store maximum of 5 line data in a field. If the data with correct format exists in the selected lines, the extracted data are stored into the buffers by the order of line number. If correct data is not found on the selected line, the data buffer is filled with `0'. All five data buffers are cleared by the line 10 sensing signal in the next field. Therefore, the data have to be read out between LN26 and the line 10 of the next field. Please read only the selected buffers. For example, if three lines are selected, read the first three 32 bit buffers only. No.6685-11/16 LC7454A/M <16 bit data judgment buffer> The data judgment buffer includes the data which indicates the existence of the Index Plus + format data and data rate (1x or 2x). Bit 0 to 4 contain the existence of the signal and bit 8 to 15 contain the data rate. Bit 7 contains the field information (Odd or Even). The following table shows functions of each bit. Output direction b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 b0 to b7 : Existence of 1x or 2x data format. Bit Contents b0 0 : Data do not exist on the first selected line. 1 : Data exist on the first selected line. b1 0 : Data do not exist on the second selected line. 1 : Data exist on the second selected line. b2 0 : Data do not exist on the third selected line. 1 : Data exist on the third selected line. b3 0 : Data do not exist on the fourth selected line. 1 : Data exist on the fourth selected line. b4 0 : Data do not exist on the fifth selected line. 1 : Data exist on the fifth selected line. b5 NOT USE b6 always"0" b7 0 : Even field 1 : Odd field b8 to b15 : Data format judgment on the selected line. Bit Contents b8 0 : 1x data format on the first line. 1 : 2x data format on the first line. b9 0 : 1x data format on the second line. 1 : 2x data format on the second line. b10 0 : 1x data format on the third line. 1 : 2x data format on the third line. b11 0 : 1x data format on the fourth line. 1 : 2x data format on the fourth line. b12 0 : 1x data format on the fifth line. 1 : 2x data format on the fifth line. b13 NOT USE b14 always"0" b15 Note `0' if no line is selected. `0' if one or less line is selected. `0' if two or less line is selected. `0' if three or less line is selected. `0' if four or less line is selected. Note `0' if no line is selected. `0' if one or less line is selected. `0' if two or less line is selected. `0' if three or less line is selected. `0' if four or less line is selected. *If neither 1x nor 2x data are sensed on the selected line, these bits become `0'. *16 bit data judgment buffer is cleared at the next line 10 as well as 32 bit data output buffer 1-5. *Even though the data judgment buffer indicates the existence of the data, it is recommended that the existence of the data should be verified by checking the parity bit of the data. No.6685-12/16 LC7454A/M Applications (Mode 1) DIP18 1 VSS1 2.2F CP 18 + - 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT 5 HS/CFIN MAIN -COM 6 DATA MOD1 15 10k VCOR 14 C-Video CVIN 13 1F 7 SCKIN MOD0 12 8 CE 9 IOC VDD1 11 SLICE 10 MFP20 2.2F + - 2 TEST 3 LN26 4 O/E/CFOUT 5 HS/CFIN MAIN COM 6 DATA 7 SCKIN 8 CE 9 IOC 10 NC VSS2 19 VDD2 18 MOD1 17 10k VCOR 16 C-Video CVIN 15 1F MOD0 14 VDD1 13 SLICE 12 NC 11 1M 1 VSS1 CP 20 1M No.6685-13/16 LC7454A/M Applications (Mode 2) DIP18 2.2F 1 VSS1 CP 18 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT MOD1 15 10k 5 HS/CFIN MAIN -COM VCOR 14 C-Video 6 DATA CVIN 13 1F 7 SCKIN MOD0 12 8 CE VDD1 11 9 IOC SLICE 10 MFP20 2.2F + - 2 TEST 3 LN26 4 O/E/CFOUT CF 5 HS/CFIN 6 DATA 7 SCKIN 8 CE 9 IOC 10 NC VSS2 19 VDD2 18 MOD1 17 VCOR 16 CVIN 15 1F MOD0 14 VDD1 13 SLICE 12 NC 11 10k C-Video MAIN -COM 1M 1 VSS1 CP 20 1M + - No.6685-14/16 LC7454A/M Applications (Mode 3) DIP18 2.2F 1 VSS1 CP 18 + - 2 TEST VSS2 17 3 LN26 VDD2 16 4 O/E/CFOUT Hsync signal (From F.B.) MAIN -COM MOD1 15 10k 5 HS/CFIN VCOR 14 C-Video 6 DATA CVIN 13 1F 7 SCKIN MOD0 12 8 CE VDD1 11 9 IOC SLICE 10 MFP20 1 VSS1 2 TEST 3 LN26 4 O/E/CFOUT Hsync signal (From F.B.) 5 HS/CFIN 6 DATA 7 SCKIN 8 CE 9 IOC 10 NC CP 20 2.2F + - VSS2 19 VDD2 18 MOD1 17 10k VCOR 16 C-Video CVIN 15 1F MOD0 14 VDD1 13 SLICE 12 NC 11 MAIN -COM 1M No.6685-15/16 LC7454A/M memo: PS No.6685-16/16 |
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